1. Field of the Invention
The present invention relates generally to integrated circuits and via hole structures for fabricating integrated circuits. More particularly, the invention relates to via hole structures which include a tungsten silicide barrier layer and to methods of forming such via hole structures.
2. State of the Art
In the manufacture of semiconductor devices, ever-decreasing device geometries have led to problems impacting adversely on device yield. For example, in devices utilizing organic spin-on-glass (SOG) for gap fill/planarization and chemical vapor deposited (CVD) tungsten for via hole plug formation, poisoning of the reaction between silane (SiH.sub.4) or hydrogen gas (H.sub.2) and tungsten hexafluoride (WF.sub.6) is a common occurrence. Such poisoning results from the outgassing of various materials from SOG at the via hole sidewall, such as water vapor and organic contaminants. Although conventional procedures for SOG coating include a post-coating bake to drive off the organic solvent and cure the layer, outgassing sources still remain in the layer. The released gas species can interfere with the tungsten CVD reaction by interacting with tungsten hexafluoride to severely alter the deposition chemistry. Voids in the tungsten plug are created, resulting in via open failures.
A commonly used solution to the above-described problem is the SOG etchback process to avoid the presence of SOG at the via sidewall. After coating a semiconductor wafer with SOG, the SOG is present in various thicknesses across the device depending on surface topography. The SOG layer is next plasma etched to the point of full removal at locations where via holes are to be formed, e.g., over metal lines, with SOG remaining in the gaps between the metal lines. This method, however, places stringent requirements on the etchback process and significantly narrows the process latitude for global planarization.
A second proposed solution to prevent SOG outgassing during CVD tungsten deposition is to sputter deposit a titanium nitride (TiN) barrier layer between the walls of the via hole and the subsequently formed tungsten plug. FIG. 1(A) illustrates a known via hole structure 100 which includes a titanium nitride barrier layer 110. After depositing metal layer 102, oxide layer 104, SOG layer 106 and oxide layer 108, via hole masking and etching is performed. Metal layer 102 forms the bottom wall of the via hole, with layers 104, 106 and 108 being exposed at the sidewalls. A thin titanium nitride layer 110 is then deposited by a sputtering process on the bottom and sidewalls of the via hole.
Titanium nitride layer 110, however, is not an effective barrier layer for the prevention of via hole poisoning, as voids 114 continue to be formed. The ineffectiveness of the titanium nitride layer stems in part from the creation of a reentrant profile 116 around the exposed SOG layer during the via etch process. Due to shadowing effects during the titanium nitride sputtering process, the titanium nitride coating along the via hole sidewall is discontinuous. As a result, SOG outgassing cannot be prevented.
FIG. 1(B) shows microcracks 120 present in titanium nitride layer 110. Some of the microcracks can extend completely through layer 110 from the via hole sidewall to the interior of the via hole. Such microcracks provide a path for the diffusion of outgassed contaminants from SOG layer 106 through barrier layer 110 to the via hole interior. Poisoning of the tungsten plug reaction and the formation of voids 114 can occur as a result.
Furthermore, grain boundaries 118 in titanium nitride film 110 provide an additional path for diffusion of the water vapor and/or organic contaminants from SOG layer 106 to the via hole interior. This diffusion along the grain boundaries can also lead to poisoning of the tungsten reaction. While use of a titanium nitride barrier layer can reduce the occurrence of via hole poisoning, open failures in via holes due to incomplete via filling remain a significant problem in device fabrication.